1. Field of the Invention
This application relates to image sensors and analog-to-digital converters (ADCs) and counters for image sensors and, more particularly, to a counter and an ADC and methods in a CMOS image sensor.
2. Description of the Related Art
Complementary metal-oxide-semiconductor (CMOS) image sensors (CISs), which are widely used in digital cameras, capture optical signals and convert the optical signals into electrical signals. The CMOS image sensor has an active pixel sensor (APS) array that includes multiple pixels arranged in rows and columns. Each pixel typically includes a photodiode and a processing or read-out circuit. The photodiode generates electrical charge using absorbed light, converts the generated electrical charge into an analog voltage or current, and delivers the analog voltage or current to the read-out circuit. The read-out circuit converts the analog signal into a digital signal and outputs the digital signal.
An analog-to-digital converter (ADC) processes received pixel data, for example, data associated with all columns in a selected row of the APS array. In the analog-to-digital conversion process, a comparator receives an analog voltage and compares the analog voltage with a ramp voltage and uses a counter to count until the ramp voltage is greater than the analog voltage. Conventionally, when the ramp voltage exceeds the analog voltage, the count value in the counter is digital data corresponding to the analog voltage. That is, the count value is the digital data into which the analog voltage has been converted.
Such an ADC can include a correlated double sampling (CDS) circuit. CDS is a technique for measuring electrical values such as voltages or currents that allows for removal of an undesired offset, and is used frequently when measuring sensor outputs such as those in a CMOS image sensor. In CDS, the output of the sensor is measured twice—once in a known or reference condition and once in an unknown condition. The value measured from the known condition is then subtracted from the unknown condition to generate a value with a known relation to the physical quantity being measured. In dual CDS operation in a CMOS image sensor, an output node is reset to a predetermined reference value, a pixel charge (signal value) is transferred to the output node, and the final value of charge assigned to the pixel is the difference between the reset and signal values. The CDS circuit may also amplify the received reset and signal values.
High-speed counters, such as ripple counters, used in CDS consume a large amount of power. One particular cause of the power consumption in such counters is the frequent toggling of the least significant bit (LSB) in the counter. It is desirable to reduce the power consumption of the counter to reduce the overall power consumption in the ADC and in the CMOS image sensor.